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  technical data KK4541B programmable timer high-performance silicon-gate cmos the kk 4541b programmable timer consists of a 16-stage binary counter, an oscillator that is contro lled by external r-c com ponents (2 resi st ors and a capaci t o r), an aut o m a t i c power-on reset ci rcui t , and out put control logic. the counter increm en ts on positive-edge clock transitons and can al so be reset vi a t h e m a ster r e set i nput . the out put from t h i s t i m er i s t h e q or not q out put from t h e 8t h, 10t h, 13t h, or 16t h count er st age. the desi red st age i s chosen usi ng t i m e-sel ect i nput s a and b . the out put i s avai l a bl e i n ei t h er of t w o m odes sel ect abl e vi a t h e m ode i nput , pi n 10. w h en t h i s m ode i nput i s a l ogi c ?1?,t h e output will be a continuous square wa ve having a frequency equal to the o s cillato r freq u e n c y d i v i d e d b y 2 n . w i t h t h e m ode i nput set t o l ogi c ?0? an d after a master reset is in itiated , th e o u t p u t (assu m i n g q o u t p u t has been selected) changes from a low to a high state after 2 n-1 count s and rem a in s in th at state u n til an o t h e r master reset p u l se is ap p lied o r t h e m ode i nput i s set t o a l ogi c ?1?. tim i ng is initialized by setting the auto reset input (pin 5) to lo g i c ?0 ?an d tu rn in g p o w er o n . if p i n 5 is set to lo g i c ?1 ?, th e auto reset circu it is d i sab l ed an d co u n tin g will n o t start u n till after a p o s itiv e master reset p u l se is ap p lied an d retu rn s to a lo w lev e l. th e auto reset co n s u m es an appreci abl e am ount of power and shoul d not be used i f l o w-power operat i on i s desi red. for rel i a bl e aut o m a t i c power-on reset , v cc shoul d be great er t h an 5v. ordering information kk 4541bn plastic kk 4541bd soic t a = -55 t o 125 c for all packages ? operat i ng vol t a ge r a nge: 3.0 t o 18 v ? m a xi m u m i nput current of 1 a at 18 v over ful l package-t e m p erat ure range; 100 na at 18 v and 25 c ? noise m a rgin (over full p ackage tem p erature range): 1.0 v m i n @ 5.0 v suppl y 2.0 v m i n @ 10.0 v suppl y 2.5 v m i n @ 15.0 v suppl y pin assignment nc = no connection logic diagram pin 14 =v cc pin 7 = gnd pins 4,11 = no connection 1
KK4541B maximum ratings * sym b o l p a r a m e t e r valu e un i t v cc dc suppl y vol t a ge (referenced t o gnd) -0.5 t o +20 v v in dc input vol t a ge (referenced t o gnd) -0.5 t o v cc +0.5 v v out dc output voltage (referenced to gnd) -0.5 to v cc +0.5 v i in dc input c u rrent , per pi n 10 ma p d po wer dissip a tio n in still air, plastic dip+ soic package+ 750 500 mw p d power di ssi pat i on per out put transi st or 100 m w tst g st orage tem p erat ure -65 t o +150 c t l lead tem p erat ure, 1 m m from c a se for 10 seconds (plastic dip or soic package) 260 c * m a xi m u m r a t i ngs are t hose val u es bey ond whi c h dam a ge t o t h e devi ce m a y occur. functional operation should be restricted to the reco m m e nded operating conditions. +derat i ng - pl ast i c dip: - 10 m w / c from 65 t o 125 c soic package: : - 7 m w / c from 65 t o 125 c recommended operating conditions sy m bol p a r a m e t e r m i n m a x uni t v cc dc suppl y vol t a ge (referenced t o gnd) 3.0 18 v v in , v out dc input vol t a ge, out put vol t a ge (referenced t o gnd) 0 v cc v t a operat i ng tem p erat ure, al l package ty pes -55 +125 c thi s devi ce cont ai ns prot ect i on ci rcui t r y t o guard agai ns t dam a ge due t o hi gh st at i c vol t a ges or el ect ri c fi el ds. however, precautions m u st be taken to avoid applications of any voltage highe r than m a xim u m rated voltages to this hi gh-i m pedance ci rcui t . for proper operat i on, v in and v out shoul d be const r ai ned t o t h e range gnd (v in or v out ) v cc . unused i nput s m u st al way s be t i e d t o an appropri a t e l ogi c vol t a ge l e vel (e.g., ei t h er gnd or v cc ). unused out put s m u st be l e ft open. 2
KK4541B dc electrical characteristics dig ital sectio n v cc guaranteed lim it sy m bol p a r a m e t e r test c ondi t i o n s v -55 c 25 c 125 c unit v ih m i ni m u m hi gh-level input vol t a ge v out =0.5v or v cc -0.5v v out =1.0v or v cc -1.0v v out =1.5v or v cc -1.5v 5 10 15 3.5 7 11 3.5 7 11 3.5 7 11 v v il m a x i mu m l o w - l e v e l input vol t a ge v out =0.5v or v cc -0.5v v out =1.0v or v cc -1.0v v out =1.5v or v cc -1.5v 5 10 15 1.5 3 4 1.5 3 4 1.5 3 4 v v oh m i ni m u m hi gh-level out put vol t a ge v in =gnd or v cc 5.0 10 15 4.95 9.95 14.95 4.95 9.95 14.95 4.95 9.95 14.95 v v ol m a x i mu m l o w - l e v e l out put vol t a ge v in =gnd or v cc 5.0 10 15 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 0.05 v i in m a xi m u m input leakage current v in = gnd or v cc 18 0.1 0.1 1.0 a i cc m a x i mu m q u i e s c e n t suppl y c u rrent (per package) v in = gnd or v cc 5.0 10 15 20 5 10 20 100 5 10 20 100 150 300 600 3000 a i ol m i ni m u m out put low (sink) current v in = gnd or v cc u ol =0.4 v u ol =0.5 v u ol =1.5 v 5.0 10 15 1.9 5 12.6 1.55 4 10 1.08 2.8 7.2 ma i oh m i ni m u m out put hi gh (source) current v in = gnd or v cc u oh =2.5 v u oh =4.6 v u oh =9.5 v u oh =13.5 v 5.0 5.0 10 15 -6.2 -1.9 -5 -12.6 -5 -1.55 -4 -10 -3 -1.08 -2.8 -7.2 ma 3
KK4541B ac electrical characteristics (c l =50pf, r l =200k ? , input t r =t f =20 ns) v cc guaranteed lim it sym b o l p a r a m e t e r v -55 c 2 5 c 125 c un it f ma x m a xi m u m c l ock frequency (fi gure 1) 5.0 10 15 1.5 4 6 1.5 4 6 0.75 2 3 mh z t plh , t phl m a xi m u m propagat i on del a y , c l ock t o q (fi gure 1) (2 8 ) 5.0 10 15 10.5 3.8 2.9 10.5 3.8 2.9 21 7.6 5.8 ns (2 16 ) 5.0 10 15 18 10 7.5 18 10 7.5 36 20 15 t thl m a xi m u m out put transi t i on ti m e , any out put (fi gure 1) 5.0 10 15 200 100 80 200 100 80 400 200 160 ns t tlh m a xi m u m out put transi t i on ti m e , any out put (fi gure 1) 5.0 10 15 360 180 130 360 180 130 720 360 260 c in m a xi m u m input c a paci t a nce - 7.5 pf timing requirements (c l =50pf, r l =200k ? , input t r =t f =20 ns) v cc guaranteed lim it sym b o l p a r a m e t e r +25 c -4 0 c to +8 5 c un it t w m i ni m u m pul s e w i dt h, m a st er r e set or c l ock (fi gure 1) 5 10 15 900 300 225 1800 600 450 ns t r ,t f m a xi m u m r i se and fal l ti m e , c l ock (fi gure 1) 5 10 15 un lim ited s 4
KK4541B fi gure 1. sw i t chi n g weveforms frequency selection table inputs no. of st ages c ount a b n 2 n l l 1 3 8 1 9 2 l h 1 0 1 0 2 4 h l 8 2 5 6 h h 1 6 6 5 5 3 6 function table pin s tate 0 1 5 au to reset on au to reset disab l e 6 master reset off master reset on 9 o u tp u t in i t i a l l y low after reset (q) ou tp u t in itially hig h after reset (n o t q) 1 0 s i ngl e transi t i o n m ode recycle mode expanded logic diagram 5
KK4541B n s u f f i x p l as t i c di p (m s - 0 0 1 a a ) sy m b o l m i n m a x a 18. 67 19. 69 b 6. 1 7 . 1 1 c 5. 33 d 0. 36 0. 56 f 1. 14 1. 78 g h j 0 10 k 2. 92 3. 81 no t e s : l 7. 62 8. 26 1. d i m e n s i o n s ?a ?, ?b ? d o n o t i n cl u d e m o l d f l as h o r p r o t r u s i o n s . m 0. 2 0 . 3 6 m a x i m u m m o l d f l a s h o r p r o t r u s i o n s 0. 25 m m ( 0 . 010) p e r s i d e . n 0. 38 d su f f i x so i c (m s - 0 1 2 a b ) sy m b o l m i n m a x a 8. 55 8. 75 b 3. 8 4 c 1. 35 1. 75 d 0. 33 0. 51 f 0. 4 1 . 2 7 g h j 0 8 no t e s : k 0. 1 0 . 2 5 1. d i m e n s i o ns a a n d b d o no t i n c l ud e m o l d f l a s h o r p r ot r u s i on . m 0. 19 0. 25 2. m a x i m u m m o l d f l a s h o r p r o t r u s i o n 0. 15 m m ( 0 . 006) p e r s i d e p 5. 8 6 . 2 fo r a ; fo r b ? 0. 25 m m ( 0 . 010) p e r s i d e . r 0. 25 0. 5 d i me n s i o n , mm 1. 27 5. 27 2. 54 7. 62 d i me n s i o n , mm a b h c k c m j f m p g d r x 4 5 se a t i n g pl an e 0.2 5 ( 0 . 0 10 ) m t -t - 1 14 7 8 a b f g d l h se a t i n g pl a n e n k 0.25 ( 0 . 010) m t m j -t - c 1 14 7 8 6


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